Integrated circuits (ICs) may be implemented to perform specified functions. One type of IC is a programmable IC, such as a field programmable gate array (FPGA). An FPGA typically includes an array of programmable tiles. These programmable tiles may include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), and so forth. Another type of programmable IC is the complex programmable logic device, or CPLD. A CPLD includes two or more “function blocks” connected together and to input/output (I/O) resources by an interconnect switch matrix. Each function block of the CPLD includes a two-level AND/OR structure similar to those used in programmable logic arrays (PLAs) and programmable array logic (PAL) devices. Other programmable ICs are programmed by applying a processing layer, such as a metal layer, that programmably interconnects the various elements on the device. These programmable ICs are known as mask programmable devices. The phrase “programmable IC” can also encompass devices that are only partially programmable, such as application specific integrated circuits (ASICs).
The increasingly high production costs of fabricating the silicon for the programmable ICs through every technology node are sunk costs, and there is elevated pressure to aggressively reduce the time to market to recover these costs through revenues. Therefore, it is imperative to conduct thorough feature-wise functional testing of the packaged programmable IC dies through the various process, voltage, and temperature (PVT) corners before shipment to customers. It is also important to attempt to minimize the costs by minimizing the test development time and the use of tester time per die, while maximizing the confidence level in the quality of the packaged programmable IC dies before customer shipment.